A prototype platform for system-on-chip ADC test and measurement

Brendan Mullane, Vincent O'Brien, Ciaran MacNamee, Thomas Fleischmann

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

An optimal solution for implementing ADC Built-In-Self-Test into a SOC design is presented. ADC linear and dynamic testing occurs in parallel which reduces test time. A signal generator produces a ramp for linear histogram measurements and a sinewave signal for dynamic tests. This platform permits a BIST design that is predominantly a digital solution and enables accurate testing using low silicon area

Original languageEnglish
Title of host publicationProceedings - IEEE International SOC Conference, SOCC 2009
Pages169-172
Number of pages4
DOIs
Publication statusPublished - 2009
EventIEEE International SOC Conference, SOCC 2009 - Belfast, Ireland
Duration: 9 Sep 200911 Sep 2009

Publication series

NameProceedings - IEEE International SOC Conference, SOCC 2009

Conference

ConferenceIEEE International SOC Conference, SOCC 2009
Country/TerritoryIreland
CityBelfast
Period9/09/0911/09/09

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