TY - JOUR
T1 - A reconfigurable low-noise amplifier using a tunable active inductor for multistandard receivers
AU - Kia, Hojjat Babaei
AU - A'Ain, Abu Khari
AU - Grout, Ian
AU - Kamisian, Izam
PY - 2013/6
Y1 - 2013/6
N2 - A reconfigurable low-noise amplifier (LNA) based on a high-value active inductor (AI) is presented in this paper. Instead of using a passive on-chip inductor, a high-value on-chip inductor with a wide tuning range is used in this circuit and results in a decrease in the physical silicon area when compared to a passive inductor-based implementation. The LNA is a common source cascade amplifier with RC feedback. A tunable active inductor is used as the amplifier output load, and for input and output impedance matching, a source follower with an RC network is used to provide a 50 Ω impedance. The amplifier circuit has been designed in 0.18 μm CMOS process and simulated using the Cadence Spectra circuit simulator. The simulation results show a reconfigurable frequency from 0.8 to 2.5 GHz, and tuning of the frequency band is achieved by using a CMOS voltage controlled variable resistor. For a selected 1.5 GHz frequency band, simulation results show S 21 (Gain) of 22 dB, S 11 of -18 dB, S 22 of -16 dB, NF of 3.02 dB, and a minimum NF (NFmin) of 1.7 dB. Power dissipation is 19.6 mW using a 1.8 V dc power supply. The total LNA physical silicon area is (200×150) μm 2.
AB - A reconfigurable low-noise amplifier (LNA) based on a high-value active inductor (AI) is presented in this paper. Instead of using a passive on-chip inductor, a high-value on-chip inductor with a wide tuning range is used in this circuit and results in a decrease in the physical silicon area when compared to a passive inductor-based implementation. The LNA is a common source cascade amplifier with RC feedback. A tunable active inductor is used as the amplifier output load, and for input and output impedance matching, a source follower with an RC network is used to provide a 50 Ω impedance. The amplifier circuit has been designed in 0.18 μm CMOS process and simulated using the Cadence Spectra circuit simulator. The simulation results show a reconfigurable frequency from 0.8 to 2.5 GHz, and tuning of the frequency band is achieved by using a CMOS voltage controlled variable resistor. For a selected 1.5 GHz frequency band, simulation results show S 21 (Gain) of 22 dB, S 11 of -18 dB, S 22 of -16 dB, NF of 3.02 dB, and a minimum NF (NFmin) of 1.7 dB. Power dissipation is 19.6 mW using a 1.8 V dc power supply. The total LNA physical silicon area is (200×150) μm 2.
KW - Active inductor (AI)
KW - Cascade amplifier
KW - Impedance matching
KW - Multistandard receiver
KW - Reconfigurable LNA
UR - http://www.scopus.com/inward/record.url?scp=84878872009&partnerID=8YFLogxK
U2 - 10.1007/s00034-012-9505-z
DO - 10.1007/s00034-012-9505-z
M3 - Article
AN - SCOPUS:84878872009
SN - 0278-081X
VL - 32
SP - 979
EP - 992
JO - Circuits, Systems, and Signal Processing
JF - Circuits, Systems, and Signal Processing
IS - 3
ER -