TY - GEN
T1 - A simulated and experimental comparison of lead-fre and tin-lead solder interconnect failure under impact stimuli
AU - Heaslip, Greg
AU - Punch, Jeff
AU - Rodgers, Bryan
AU - Ryan, Claire
AU - Reid, Michael
PY - 2005
Y1 - 2005
N2 - There is considerable reported evidence that a large percentage of failures which afflict portable electronic products are due to impact or shock during use. Failures of the external housing, internal electronic components, package-to-board interconnects, and liquid crystal display panels may occur as the result of accidental drops. Moreover, the introduction of lead-free solder to the electronics industry will bring additional design implications for future generations of mobile electronic systems. In this paper, drop tests performed on PCBs populated with ball grid arrays (BGAs) are reported. During testing, measurements from strain gages were recorded using a high-speed data acquisition system. Electrical continuity through each package was monitored during the impact event in order to detect failure of package-to-board interconnects. Life distributions were established for both a lead-free and a tin-lead solder for various drop heights. In addition, failure analysis was carried out using microsection techniques, scanning electron microscopy (SEM), and energy dispersive spectroscopy (EDS). Resistance measurements throughout the drop event indicated that different failure mechanisms occurred for different drop heights. The explicit finite element (FE) method was employed to evaluate the peel stress at the critical solder joint and a stress-life model is then established for the lead-free solder. The maximum peel stress location was found to match the location of failure initiation revealed from the failure analysis. It was also discovered that, for board level drop testing, that there is a considerable difference between the lead-free solder characteristic life and the tin-lead solder characteristic life.
AB - There is considerable reported evidence that a large percentage of failures which afflict portable electronic products are due to impact or shock during use. Failures of the external housing, internal electronic components, package-to-board interconnects, and liquid crystal display panels may occur as the result of accidental drops. Moreover, the introduction of lead-free solder to the electronics industry will bring additional design implications for future generations of mobile electronic systems. In this paper, drop tests performed on PCBs populated with ball grid arrays (BGAs) are reported. During testing, measurements from strain gages were recorded using a high-speed data acquisition system. Electrical continuity through each package was monitored during the impact event in order to detect failure of package-to-board interconnects. Life distributions were established for both a lead-free and a tin-lead solder for various drop heights. In addition, failure analysis was carried out using microsection techniques, scanning electron microscopy (SEM), and energy dispersive spectroscopy (EDS). Resistance measurements throughout the drop event indicated that different failure mechanisms occurred for different drop heights. The explicit finite element (FE) method was employed to evaluate the peel stress at the critical solder joint and a stress-life model is then established for the lead-free solder. The maximum peel stress location was found to match the location of failure initiation revealed from the failure analysis. It was also discovered that, for board level drop testing, that there is a considerable difference between the lead-free solder characteristic life and the tin-lead solder characteristic life.
KW - BGA
KW - Drop test
KW - Failure analysis
KW - Lead-free solder
KW - Simulation
UR - http://www.scopus.com/inward/record.url?scp=32844471008&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:32844471008
SN - 0791842002
T3 - Proceedings of the ASME/Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems: Advances in Electronic Packaging 2005
SP - 1283
EP - 1291
BT - Proceedings of the ASME/Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems
T2 - ASME/Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems: Advances in Electronic Packaging 2005
Y2 - 17 July 2005 through 22 July 2005
ER -