TY - GEN
T1 - An approach to the implementation of digital control algorithms in mixed-mode ASIC designs
AU - Grout, I. A.
AU - Burge, S. E.
AU - Winsby, A. J.
N1 - Publisher Copyright:
© 1999 IEEE.
PY - 1999
Y1 - 1999
N2 - In the field of control systems, electronic circuits form the heart of many control algorithm implementation strategies. The standard approach in many applications utilises a digital control algorithm with, where necessary, external analogue and mixed-signal interfacing circuitry. With the growth of HDL modelling of digital ASIC circuits and systems prior to fixing the final ASIC structure, consideration is given to the use of the various design approaches taken to realise the final product. This paper describes an approach in which a digital control algorithm core may be created using VHDL with a design and analysis flow at both the ASIC and control systems level. The algorithm core of the ASIC is part of an overall mixed-mode (mixed-signal) design, which is part of an overall mixed-technology solution. Macro modeling of the overall control system that targets available modeling and simulation approaches complements the VHDL core.
AB - In the field of control systems, electronic circuits form the heart of many control algorithm implementation strategies. The standard approach in many applications utilises a digital control algorithm with, where necessary, external analogue and mixed-signal interfacing circuitry. With the growth of HDL modelling of digital ASIC circuits and systems prior to fixing the final ASIC structure, consideration is given to the use of the various design approaches taken to realise the final product. This paper describes an approach in which a digital control algorithm core may be created using VHDL with a design and analysis flow at both the ASIC and control systems level. The algorithm core of the ASIC is part of an overall mixed-mode (mixed-signal) design, which is part of an overall mixed-technology solution. Macro modeling of the overall control system that targets available modeling and simulation approaches complements the VHDL core.
UR - http://www.scopus.com/inward/record.url?scp=85041281572&partnerID=8YFLogxK
U2 - 10.1109/MMICA.1999.833608
DO - 10.1109/MMICA.1999.833608
M3 - Conference contribution
AN - SCOPUS:85041281572
T3 - Proceedings of the 3rd International Workshop on Design of Mixed-Mode Integrated Circuits and Applications
SP - 98
EP - 101
BT - Proceedings of the 3rd International Workshop on Design of Mixed-Mode Integrated Circuits and Applications
A2 - Samiento-Reyes, Arturo
A2 - Sanchez-Sinencio, Edgar
A2 - Silva-Martinez, Jose
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 3rd International Workshop on Design of Mixed-Mode Integrated Circuits and Applications
Y2 - 26 July 1999 through 28 July 1999
ER -