TY - GEN
T1 - An effective network processor design framework - Using multi-objective evolutionary algorithms and object oriented techniques to optimise the intel IXP1200 network processor
AU - Noonan, Liam
AU - Flanagan, Colin
PY - 2006
Y1 - 2006
N2 - In this paper we present a framework for design space exploration of a network processor, that incorporates parameterisation, power and cost analysis. This method utilises multi-objective evolutionary algorithms and object oriented analysis and design. Using this approach an engineer specifies certain hard and soft performance requirements for a multi-processor system, and allows it to be generated automatically by competitive evolution/optimisation, thus obviating the need for detailed design. To make the proposal concrete, we use the Intel IXP1200 network processor as a baseline complex system design and show how various improvements can be make to this architecture by evolutionary/ competitive design. Various approaches to multi-objective optimisation (Darwin, Lamarck Baldwin, etc.) are compared and contrasted in their ability to generate architectures meeting various constraints. We also present an assessment of a proposed architecture with reference to four different packet processing roles. The merits of an "island clocking" scheme versus a "common clocking" scheme are also discussed. Our paper highlights the flexibility that this framework bestows on the designer, along with the potential to achieve cost savings and performance improvement.
AB - In this paper we present a framework for design space exploration of a network processor, that incorporates parameterisation, power and cost analysis. This method utilises multi-objective evolutionary algorithms and object oriented analysis and design. Using this approach an engineer specifies certain hard and soft performance requirements for a multi-processor system, and allows it to be generated automatically by competitive evolution/optimisation, thus obviating the need for detailed design. To make the proposal concrete, we use the Intel IXP1200 network processor as a baseline complex system design and show how various improvements can be make to this architecture by evolutionary/ competitive design. Various approaches to multi-objective optimisation (Darwin, Lamarck Baldwin, etc.) are compared and contrasted in their ability to generate architectures meeting various constraints. We also present an assessment of a proposed architecture with reference to four different packet processing roles. The merits of an "island clocking" scheme versus a "common clocking" scheme are also discussed. Our paper highlights the flexibility that this framework bestows on the designer, along with the potential to achieve cost savings and performance improvement.
KW - Design space exploration
KW - Evolutionary approaches
KW - Object oriented
UR - http://www.scopus.com/inward/record.url?scp=34547654198&partnerID=8YFLogxK
U2 - 10.1145/1185347.1185362
DO - 10.1145/1185347.1185362
M3 - Conference contribution
AN - SCOPUS:34547654198
SN - 1595935800
SN - 9781595935809
T3 - ANCS 2006 - Proceedings of the 2006 ACM/IEEE Symposium on Architectures for Networking and Communications Systems
SP - 103
EP - 112
BT - ANCS 2006 - Proceedings of the 2006 ACM/IEEE Symposium on Architectures for Networking and Communications Systems
T2 - 2nd ACM/IEEE Symposium on Architectures for Networking and Communications Systems, ANCS 2006
Y2 - 3 December 2006 through 5 December 2006
ER -