TY - GEN
T1 - Automatic test case generation for vulnerability analysis of galois field arithmetic circuits
AU - Gupt, Krishn Kumar
AU - Kshirsagar, Meghana
AU - Sullivan, Joseph P.
AU - Ryan, Conor
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/1/8
Y1 - 2021/1/8
N2 - The research work proposes a framework for checking the correctness of Galois field arithmetic operations in digital circuits. The authors propose to automatically generate the test cases from the user input, avoiding reliance upon predesigned test cases, comprising Galois field-width and respective choice of irreducible polynomial. We do this through the use of polynomial arithmetic to verify the circuits. To the best of author's knowledge, though extensive work has been carried out in optimising the performance of arithmetic operations in Galois field, there exist no testbench to evaluate the efficacy of hardware circuits incorporating this concept. By automating the process of generating test cases, the work can be scaled to test circuits of arbitrarily large field widths, thus providing a flexible architecture that guarantees correctness of the underlying design under test. We present simulation results for Galois field polynomials of width GF(22)), GF(24) and GF(28). This work can be applied to test and prevent intentional tampering of data bit stream and safeguarding it against malicious activities, especially in applications such as cryptography that heavily relies on Galois field arithmetic.
AB - The research work proposes a framework for checking the correctness of Galois field arithmetic operations in digital circuits. The authors propose to automatically generate the test cases from the user input, avoiding reliance upon predesigned test cases, comprising Galois field-width and respective choice of irreducible polynomial. We do this through the use of polynomial arithmetic to verify the circuits. To the best of author's knowledge, though extensive work has been carried out in optimising the performance of arithmetic operations in Galois field, there exist no testbench to evaluate the efficacy of hardware circuits incorporating this concept. By automating the process of generating test cases, the work can be scaled to test circuits of arbitrarily large field widths, thus providing a flexible architecture that guarantees correctness of the underlying design under test. We present simulation results for Galois field polynomials of width GF(22)), GF(24) and GF(28). This work can be applied to test and prevent intentional tampering of data bit stream and safeguarding it against malicious activities, especially in applications such as cryptography that heavily relies on Galois field arithmetic.
KW - Cryptography
KW - Galois field
KW - ModelSim
KW - Test bench
UR - http://www.scopus.com/inward/record.url?scp=85102521985&partnerID=8YFLogxK
U2 - 10.1109/CSP51677.2021.9357567
DO - 10.1109/CSP51677.2021.9357567
M3 - Conference contribution
AN - SCOPUS:85102521985
T3 - 2021 IEEE 5th International Conference on Cryptography, Security and Privacy, CSP 2021
SP - 32
EP - 37
BT - 2021 IEEE 5th International Conference on Cryptography, Security and Privacy, CSP 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 5th IEEE International Conference on Cryptography, Security and Privacy, CSP 2021
Y2 - 8 January 2021 through 10 January 2021
ER -