CMOS-Integrated High-Voltage Transformer for a Galvanically Isolated DC-DC Converter

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Abstract

This paper presents layout techniques and optimizations applicable to high-voltage, chip-integrated, galvanically isolated transformers implemented on a thick oxide standard CMOS process. A novel shield implementation for reduced inter-coil capacitance and improved CMTI performance is discussed. Benefits and impacts of the shield in terms of CMTI-coupled currents, quality factor and transformer power-transfer efficiency are modeled, simulated and presented. An accurate distributed circuit simulation model, derived from the y-parameters produced by a 3D finite-element planar electromagnetic solver is assessed. The circuit simulation model supports the design of the CMOS-integrated power conversion system embedding the transformer.

Original languageEnglish
Title of host publication2022 33rd Irish Signals and Systems Conference, ISSC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665452274
DOIs
Publication statusPublished - 2022
Event33rd Irish Signals and Systems Conference, ISSC 2022 - Cork, Ireland
Duration: 9 Jun 202210 Jun 2022

Publication series

Name2022 33rd Irish Signals and Systems Conference, ISSC 2022

Conference

Conference33rd Irish Signals and Systems Conference, ISSC 2022
Country/TerritoryIreland
CityCork
Period9/06/2210/06/22

Keywords

  • CMTI
  • galvanically isolated
  • high-voltage
  • inter-coil capacitance
  • layout techniques
  • On-chip transformer
  • shielding

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