@inproceedings{8d845543316f42369fce46e407b556c8,
title = "Efficient FPGA implementation of secure hash algorithm Gr{\o}stl-SHA-3 finalist",
abstract = "Cryptographic hash functions are used for digital signatures; message authentication codes (MACs) and other forms of authentication. National Institute of Standards and Technology (NIST) announced a publicly open competition for selection of new standard Secure Hash Algorithm called SHA-3. Hardware performance evaluation of the candidates of this competition is a vital part of this contest. In this work we present an efficient FPGA implementation of Gr{\o}stl, one of the final round candidates of SHA-3. We show our results in the form of chip area consumption, throughput and throughput per area. We compare and contrast these results with other reported implementations of Gr{\o}stl. Our design ranks highest in terms of throughput per area, achieving figures of 5.47 Mbps/slice on Virtex 7 and 5.12 Mbps/slice for Gr{\o}stl-256 on Virtex 6.",
keywords = "FPGA, Gr{\o}stl, Hash Functions, High Speed Hardware, SHA-3",
author = "Rao, {M. Muzaffar} and Kashif Latif and Arshad Aziz and Athar Mahboob",
year = "2012",
doi = "10.1007/978-3-642-28962-0_35",
language = "English",
isbn = "9783642289613",
series = "Communications in Computer and Information Science",
pages = "361--372",
booktitle = "Emerging Trends and Applications in Information Communication Technologies - Second International Multi Topic Conference, IMTIC 2012, Proceedings",
note = "2nd International Multi Topic Conference, IMTIC 2012 ; Conference date: 28-03-2012 Through 30-03-2012",
}