Efficient utilization of FPGA using LUT-6 architecture

Razia Zia, Muzaffar Rao, Arshad Aziz, Parvez Akhtar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Field Programmable gate array (FPGA) technology is continuously gaining market share and becoming essential part of the today's modern embedded systems. The most common FPGA architecture consists of an array of logic blocks called Configurable Logic Block (CLB), I/O pads, and routing channels. In general, a logic block (CLB) consists of logical cells called Slices and other dedicated resources. A typical cell consists of LUTs (Look up table). In modern FPGAs, there are 6-input LUTs instead of 4-input LUTs. In this paper we present the use of 6-input LUT architecture for some Boolean functions (Mux8, Mux16, Mux32, Mux64, SOP64, OR40 and AND40).we show our results in terms of LUTs and Slices and these results are much better as compare to previously reported results that based on 4-input LUTs.

Original languageEnglish
Title of host publicationIndustrial Instrumentation and Control Systems
Pages2548-2554
Number of pages7
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event2012 International Conference on Measurement, Instrumentation and Automation, ICMIA 2012 - Guangzhou, China
Duration: 15 Sep 201216 Sep 2012

Publication series

NameApplied Mechanics and Materials
Volume241-244
ISSN (Print)1660-9336
ISSN (Electronic)1662-7482

Conference

Conference2012 International Conference on Measurement, Instrumentation and Automation, ICMIA 2012
Country/TerritoryChina
CityGuangzhou
Period15/09/1216/09/12

Keywords

  • FPGA
  • LUT-6 Architecture

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