TY - GEN
T1 - Experimental assessment of FIRO- and GARO-based noise sources for digital TRNG designs on FPGAs
AU - Schramm, Martin
AU - Dojen, Reiner
AU - Heigl, Michael
N1 - Publisher Copyright:
© 2017 University of West Bohemia.
PY - 2017/9/28
Y1 - 2017/9/28
N2 - The quality of TRNG designs mainly depends on the grade of the noise source from which the entropy will be harvested to extract randomness. Especially for purely digital noise sources suitable for FPGA implementations the use of Ring Oscillators is suggested in many scientific publications. Standard Ring Oscillator based noise sources however have earned some criticism regarding the amount of entropy generated. On this account different enhancements have been proposed, with Fibonacci Ring Oscillators (FIROs) and Galois Ring Oscillators (GAROs) being prominent examples, which under some circumstances are able to sustain a chaotic oscillation suitable for entropy extraction. This paper deals with the assessment of fully constrained FIRO and GARO noise source designs for a specific target FPGA. Due to the restrictive placement of ring elements the assessment yielded new criteria for choosing proper FIRO/GARO feedback configurations and an enhanced sampling method for entropy extraction has been derived.
AB - The quality of TRNG designs mainly depends on the grade of the noise source from which the entropy will be harvested to extract randomness. Especially for purely digital noise sources suitable for FPGA implementations the use of Ring Oscillators is suggested in many scientific publications. Standard Ring Oscillator based noise sources however have earned some criticism regarding the amount of entropy generated. On this account different enhancements have been proposed, with Fibonacci Ring Oscillators (FIROs) and Galois Ring Oscillators (GAROs) being prominent examples, which under some circumstances are able to sustain a chaotic oscillation suitable for entropy extraction. This paper deals with the assessment of fully constrained FIRO and GARO noise source designs for a specific target FPGA. Due to the restrictive placement of ring elements the assessment yielded new criteria for choosing proper FIRO/GARO feedback configurations and an enhanced sampling method for entropy extraction has been derived.
UR - http://www.scopus.com/inward/record.url?scp=85034597700&partnerID=8YFLogxK
U2 - 10.23919/AE.2017.8053618
DO - 10.23919/AE.2017.8053618
M3 - Conference contribution
AN - SCOPUS:85034597700
T3 - International Conference on Applied Electronics
BT - 22nd 2017 International Conference on Applied Electronics, AE 2017
A2 - Pinker, Jiri
PB - IEEE Computer Society
T2 - 22nd International Conference on Applied Electronics, AE 2017
Y2 - 5 September 2017 through 6 September 2017
ER -