From chip to cooling tower data center modeling: Influence of chip temperature control philosophy

Ed J. Walsh, Thomas J. Breen, Jeff Punch, Amip J. Shah, Cullen E. Bash

Research output: Contribution to journalArticlepeer-review

Abstract

The chiller cooled data center environment consists of many interlinked elements that are usually treated as individual components. This chain of components and their influences on each other must be considered in determining the benefits of any data center design and operational strategies seeking to improve efficiency, such as temperature controlled fan algorithms. Using the models previously developed by the authors, this paper extends the analysis to include the electronics within the rack through considering the processor heat sink temperature. This has allowed determination of the influence of various cooling strategies on the data center coefficient of performance. The strategy of increasing inlet aisle temperature is examined in some detail and found not to be a robust methodologyfor improving the overall energy performance of the data center, while tight temperature controls at the chip level consistently provide better performance, yielding more computing per watt of cooling power. These findings are of strong practical relevance for the design of fan control algorithms at the rack level and general operational strategies in data centers. Finally, the impact of heat sink thermal resistance is considered, and the potential data center efficiency gains from improved heat sinkdesigns are discussed.

Original languageEnglish
Pages (from-to)31008-1-31008-6
JournalJournal of Electronic Packaging, Transactions of the ASME
Volume133
Issue number3
DOIs
Publication statusPublished - Sep 2011

Keywords

  • Chip to cooling tower
  • Data center cooling
  • Energy efficiency
  • Heat sink
  • Thermal management

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