TY - GEN
T1 - High resolution DPWM in a DC-DC converter application using digital sigma-delta techniques
AU - Kelly, Anthony
AU - Rinne, Karl
PY - 2005
Y1 - 2005
N2 - This paper demonstrates a dc-dc converter application in which a multi-bit digital sigma-delta modulator pre-processes the duty-cycle value before application to the DPWM, increasing the effective resolution of the DPWM dramatically. In this method, the DPWM duty-cycle command is pre-processed by a multi-bit digital sigma-delta modulator, so that the DPWM quantization noise will be shaped in frequency. As a result, the total quantization noise at the output of the dc-dc converter is reduced, and the effective resolution of the DPWM in the control loop is increased dramatically. A prototype converter was seen to perform with an effective DPWM resolution of at least 11 bits, with an actual DPWM resolution of less than 6 bits.
AB - This paper demonstrates a dc-dc converter application in which a multi-bit digital sigma-delta modulator pre-processes the duty-cycle value before application to the DPWM, increasing the effective resolution of the DPWM dramatically. In this method, the DPWM duty-cycle command is pre-processed by a multi-bit digital sigma-delta modulator, so that the DPWM quantization noise will be shaped in frequency. As a result, the total quantization noise at the output of the dc-dc converter is reduced, and the effective resolution of the DPWM in the control loop is increased dramatically. A prototype converter was seen to perform with an effective DPWM resolution of at least 11 bits, with an actual DPWM resolution of less than 6 bits.
UR - http://www.scopus.com/inward/record.url?scp=33847703222&partnerID=8YFLogxK
U2 - 10.1109/PESC.2005.1581822
DO - 10.1109/PESC.2005.1581822
M3 - Conference contribution
AN - SCOPUS:33847703222
SN - 0780390334
SN - 9780780390331
T3 - PESC Record - IEEE Annual Power Electronics Specialists Conference
SP - 1458
EP - 1463
BT - 36th IEEE Power Electronics Specialists Conference 2005
ER -