Abstract
In this paper, an education tool for assisting the teaching and learning of the IEEE 1500 standard testability method, used to support the testing of complex system-on-a-chip (SoC) integrated circuits (ICs), is developed and presented. The tool is an Internet browser based tool that supports the ability to investigate key aspects of the standard and its application to IC designs. The tool allows the user to create VHDL descriptions of both the test circuitry and the function circuitry via the Internet browser interface. The key considerations for developing this tool were to provide a computer based learning tool to support the teaching and learning of the standard and its application, and to allow the learner to investigate the design of integrated circuits that would require the use of this standard testability method through the use of VHDL (VHSIC hardware description language (HDL)).
| Original language | English |
|---|---|
| Article number | 6201037 |
| Journal | IEEE Global Engineering Education Conference, EDUCON |
| DOIs | |
| Publication status | Published - 2012 |
| Event | 2012 IEEE Global Engineering Education Conference, EDUCON 2012 - Marrakech, Morocco Duration: 17 Apr 2012 → 20 Apr 2012 |
Keywords
- Design for testability
- IEEE standards
- system-on-a-chip
- testing