Programmable ASIC-based analogue-dsp interface for real-time data collection

A novel all-hardware technique for reai-time interface of standard DSP devices to analogue-to-digital converters (ADCs) has been developed and implemented in the form of a programmable ASIC system. The technique is based on a double buffer approach and uses a phase-locked loop unit to control the synchronous parts of the system. The double buffer is facilitated by two on-chip IK RAM blocks, as appropriate for a predefined data frame size of 1024 samples. The system continuously samples data from an ADC and stores it in one of the RAMs, while the DSP retrieves the data stored in the second RAM from previous sampling interval, and processes it. The technique is appropriate for real-dme implementation of DSP algorithms that use the block processing approach. It eliminates the need for all software-based interrupt service and data collection routines and thus offers designers the advantage of utilising the full power of the DSP device used in a given application. The technique is shown to offer faster processing and more accurate, steady and higher sampling rates of the analogue signals to be processed.