Programmable bandwidth operational amplifier with negative miller compensation

Muhaned Zaidi, Ian Grout, Abu Khari A'ain

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents a novel technique to design a programmable bandwidth single-ended output CMOS operational amplifier using a serial digital interface. The circuit topology enables the programming of the value of a negative Miller capacitance around first amplification stage and programming of the value of a Miller capacitance around the second amplification stage. Therefore, a controllable frequency response op-Amp is created that can be digitally controlled from a host digital processor. The design is based on a rail-To-rail output CMOS operational amplifier architecture where the first stage of the op-Amp consists of differential input and folded cascode circuits, and the second stage is a class AB amplifier. The design has been designed using a 0.35 μm CMOS technology, its operation simulated using the Cadence Spectre simulator and operates on a +3.3V power supply.

Original languageEnglish
Title of host publication2017 International Electrical Engineering Congress, iEECON 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509046669
DOIs
Publication statusPublished - 19 Oct 2017
Event2017 International Electrical Engineering Congress, iEECON 2017 - Pattaya, Thailand
Duration: 8 Mar 201710 Mar 2017

Publication series

Name2017 International Electrical Engineering Congress, iEECON 2017

Conference

Conference2017 International Electrical Engineering Congress, iEECON 2017
Country/TerritoryThailand
CityPattaya
Period8/03/1710/03/17

Keywords

  • Analog switch
  • Bandwith
  • Negative miller compensation
  • Operational amplifier

Fingerprint

Dive into the research topics of 'Programmable bandwidth operational amplifier with negative miller compensation'. Together they form a unique fingerprint.

Cite this