@inproceedings{005827d0983e4994819753e168312f3f,
title = "Systolic architectures for decoding Reed Solomon codes",
abstract = "A systolic implementation of a Reed-Solomon decoder is presented which with minor modification is suitable for BCH and Goppa codes. The various operations involved in decoding such codes were analyzed and the results are described. Systolic array architectures are derived for the various steps including the syndrome calculation, key equation solution and error evaluation. Since the throughput of the decoder is effectively determined by the speed of the multipliers, various multiplier architectures are discussed briefly. The architectures presented improve upon previous designs. The result is highly regular and modular, and thus it is more suitable for VLSI implementation.",
author = "John Nelson and Abdur Rahman and Eamonn McQuade",
year = "1991",
language = "English",
isbn = "0818690895",
series = "Proc 90 Int Conf Appl Specif Array Process",
publisher = "Publ by IEEE",
pages = "67--77",
booktitle = "Proc 90 Int Conf Appl Specif Array Process",
note = "Proceedings of the 1990 International Conference on Application Specific Array Processors ; Conference date: 05-09-1990 Through 07-09-1990",
}