Systolic array description in F²

The present paper is aimed at investigating some aspects of F² relevant in the description of peculiar VLSI designs. Since spatial recursivity and bidirectionality are widely considered to be critical points for functional languages, we concentrate on the design and modelling of regular structures, such as the class of systolic arrays. One of the examples is a bidirectional shift register which includes both bidirectional data flow and regular array retiming, with structural transformations between semi-systolic and systolic hardware implementation. A semi-systolic priority queue is first defined in F² in an Abstract Data Type style, then an implementation is sketched.