Systolic design of a new finite field division/inverse algorithm

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A systolic architecture of a newly developed algorithm for performing division and inversion over GF(2m) has been successfully realized. It is novel in that the normal inverse/multiplication steps are integrated and the generator polynomial is selectable. The new design with its inherent regularity offers an expandable, fully pipelined high performance circuit, that is very suitable to a VLSI implementation. A GF(28) divider has been successfully implemented under the EUROCHIP program.

Original languageEnglish
Title of host publicationProceedings of International Conference on Application Specific Array Processors, ASAP 1993
EditorsBenjamin Wah, Luigi Dadda
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages188-191
Number of pages4
ISBN (Electronic)0818634928
DOIs
Publication statusPublished - 1993
Event1993 International Conference on Application Specific Array Processors, ASAP 1993 - Venice, Italy
Duration: 25 Oct 199327 Oct 1993

Publication series

NameProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)1063-6862

Conference

Conference1993 International Conference on Application Specific Array Processors, ASAP 1993
Country/TerritoryItaly
CityVenice
Period25/10/9327/10/93

Fingerprint

Dive into the research topics of 'Systolic design of a new finite field division/inverse algorithm'. Together they form a unique fingerprint.

Cite this