Abstract
Efficient proof techniques are vital for the success of formal verification of hardware. First-Order Logic theorem provers satisfy this requirement. This paper deals with experiences in applying such a tool, OTTER, to boolean expression and combinational logic. Preliminary results are reported and future developments are described.
Original language | English |
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Pages (from-to) | 421-428 |
Number of pages | 8 |
Journal | Microprocessing and Microprogramming |
Volume | 30 |
Issue number | 1-5 |
DOIs | |
Publication status | Published - Aug 1990 |
Externally published | Yes |