Virtually reducing product development time

T. Hogan; D. Heffernan

doi:10.1049/me:20010309

Virtually reducing product development time

T. Hogan, D. Heffernan

Analog Devices, Inc.

Research output: Contribution to specialist publication › Article

Abstract

Virtual test applied to integrated circuit (IC) testing to reduce the overall product development time in IC manufacturing is discussed. The test is based on software-based simulation environment where an emulated test capability interacts with a software model of the IC device. Virtual tests allows the simulation of the physical test instruments, test programs, new device under test (DUT) and device interface board (DIB). The resulting reduction in product development time is presented as the key to competitive success of individual companies.

Original language	English
Pages	122-128
Number of pages	7
Volume	80
No.	3
Specialist publication	Manufacturing Engineer
DOIs	https://doi.org/10.1049/me:20010309
Publication status	Published - Jun 2001
Externally published	Yes

Access to Document

10.1049/me:20010309

Cite this

@misc{7d7d351361494951b3799785e5ba3554,

title = "Virtually reducing product development time",

abstract = "Virtual test applied to integrated circuit (IC) testing to reduce the overall product development time in IC manufacturing is discussed. The test is based on software-based simulation environment where an emulated test capability interacts with a software model of the IC device. Virtual tests allows the simulation of the physical test instruments, test programs, new device under test (DUT) and device interface board (DIB). The resulting reduction in product development time is presented as the key to competitive success of individual companies.",

author = "T. Hogan and D. Heffernan",

year = "2001",

month = jun,

doi = "10.1049/me:20010309",

language = "English",

volume = "80",

pages = "122--128",

journal = "Manufacturing Engineer",

issn = "0956-9944",

}

TY - GEN

T1 - Virtually reducing product development time

AU - Hogan, T.

AU - Heffernan, D.

PY - 2001/6

Y1 - 2001/6

N2 - Virtual test applied to integrated circuit (IC) testing to reduce the overall product development time in IC manufacturing is discussed. The test is based on software-based simulation environment where an emulated test capability interacts with a software model of the IC device. Virtual tests allows the simulation of the physical test instruments, test programs, new device under test (DUT) and device interface board (DIB). The resulting reduction in product development time is presented as the key to competitive success of individual companies.

AB - Virtual test applied to integrated circuit (IC) testing to reduce the overall product development time in IC manufacturing is discussed. The test is based on software-based simulation environment where an emulated test capability interacts with a software model of the IC device. Virtual tests allows the simulation of the physical test instruments, test programs, new device under test (DUT) and device interface board (DIB). The resulting reduction in product development time is presented as the key to competitive success of individual companies.

UR - http://www.scopus.com/inward/record.url?scp=0035365366&partnerID=8YFLogxK

U2 - 10.1049/me:20010309

DO - 10.1049/me:20010309

M3 - Article

AN - SCOPUS:0035365366

SN - 0956-9944

VL - 80

SP - 122

EP - 128

JO - Manufacturing Engineer

JF - Manufacturing Engineer

ER -

Virtually reducing product development time

Abstract

Access to Document

Other files and links

Fingerprint

Cite this